GROUP LEADER
Prof.Rui Maranhão Abreu
rui@computer.org
RESEARCH PROJECT/RESEARCH GROUP
Information and Decision Support Systems Group Website
https://idss.inesc-id.pt/
POSITION DESCRIPTION
-Research Project / Research Group Description:
It is well-known that Quantum Computing (QC) has the potential to solve complex problems efficiently in various domains and bring breakthroughs in science and technology. Nowadays, quantum applications span over algorithms addressing optimization problems, such as radiotherapy optimization, machine learning techniques, chemistry simulations, and modelling (eg., handling uncertainties when predicting events).  The development of QC is also driven by the urgent need of solving ever-complex and large-scale problems, which current (super)computers cannot solve, and QC comes right on time to bring revolutionary computational power to handle such complexity. 
Though QC hardware is still immature, as most of the existing QC systems can only handle a limited number of qubits and are affected by noise, this is the time for getting “quantum ready”.  This means that industrial and academic research institutions can use this time to learn QC, devise new quantum algorithms, and build QC communities.  Specifically, the Quantum for Software Engineering (Q4SE) project aims to establish the theoretical foundations of a QC infrastructure supporting all aspects of software engineering and enable the development of high-quality quantum applications that can assist developers throughout the entire development lifecycle.   
We regard Q4SE’s domain as a new sub-field of software engineering that we expect to see growing in the next years, levering quantum languages and frameworks, such as Q# and Qiskit, Consequently, Q4SE will become highly relevant for the software engineering community in the years to come. Currently, there is still no one leading any efforts on Quantum Computing in the Programming Languages and Software Engineering communities. 
-Job position description:
The ambition of this project is to develop radically new methods for automated program analysis of classical software applications. It is well known that program analysis is a prohibitive task. Dynamic program analysis of programs is not reliable since it is intrinsically affected by false negatives, in that issues in programs can be identified during testing only if the testing suite exploits them. Static program analysis is, from this point of view, a much more promising alternative because it has the potential of being sound; in other words, at least theoretically, static program analysis should be able to have no false negatives. The problem with static program analysis is that, since its findings are based on a mathematical model of each program under analysis, for such model to be sound it has to overapproximate the set of all the program states that the program can take at run time. 
Such overapproximation inevitably leads to false positives. Today’s programs are very large and complex, and depend on additional metadata associated with them, such as deployment descriptors and configuration files. In order to build a sound mathematical model of such a large and complex program, a static analyser has to sacrifice precision, which means that the number of false positive quickly becomes very high—so much so that developers refuse to use static analyzers because of the time wasted in filtering out false positives. In order to reduce the number of false positives, numerous solutions have been proposed, but they all boil down to increasing the model’s precision, which in turn reduces the scalability of the analyser. The main goal of the Q4SE project will be to devise new QC algorithms for static analysis of classical programs, taking advantage of the computational power of quantum computers to resolve the well-known scalability/precision dichotomy

GROUP LEADER
Prof.António Grilo
antonio.grilo@inesc-id.pt
RESEARCH PROJECT/RESEARCH GROUP
Website of the Computing Systems and Communication Networks, which encompasses the Communication Networks group.
https://www.inesc-id.pt/research-areas/computing-systems-and-communication-networks/
POSITION DESCRIPTION
-Research Project / Research Group Description:
The Next Generation IoT (NGIoT) is the evolution of the Internet of Things (IoT) to become more secure, safe, trusted and human centric. NGIoT will become offer advanced and tactile IoT interfaces to the end user, together with hyperconnectivity, edge computing, distributed Ledger Technologies (DLTs) and Artificial Intelligence (AI) to optimize information processing. 
Fifth generation (5G) is one of the main enablers, providing high capacity mobile communication to NGIoT edge components. Transmission speeds in the order of the Gbit/s and submillisecond latency will enabling resource heavy applications, intelligent distributed camera networks and autonomous vehicles. However, the current cloud based computation and data delivery model does not allow the required quality of service (QoS) guarantees to be efficiently harnessed, due to the number of hops of wired networks between the 5G base stations and the cloud, which leads to a significant increase in latency. 
Moreover, in a massively sensed world, forwarding all the data generated by devices directly to the cloud may consume the available bandwidth and lead to congestion. Therefore, it is necessary that processing be hosted near the devices, close to the source of the data, so that the high speed transmission of 5G can be utilized and data can be processed and filtered out by the time it reaches the cloud. 
This bringing down of computation, storage and networking services to the network edge opens up many new research areas of applying Fog Computing over the 5G cellular network architecture. One of these research areas is service placement and migration optimization, whereby computing resources are assigned to service instance modules in the edge, fog and cloud in such a way as to meet application requirements and maximize resource management efficiency.
-Job position description:
This task will be hosted by the Communication Networks group of INESC-ID. The task consists in performing innovative research on the fog placement and migration optimization schemes in the context of NGIoT. Road safety in autonomous vehicle scenarios is regarded one of the most promising and challenging applications, though other IoT application may also be addressed. Real-time requirements, coupled with the need of communicating high data rates, clearly demand edge/fog computing solutions.
The accepted fellow will depart from existing related work on fog/cloud resource management and research innovative schemes that surpass or significantly improve the latter. Iterative optimization methods and genetic algorithms have been frequently used in related work, including previous work by our group. 
In order to become more scalable, two additional techniques will be investigated and possibly integrated:
 Hierarchical partition of edge/fog resources and with algorithm instances running in
parallel at the same and different levels.
 Optimization based on Machine Learning techniques. This consists of using tools such as deep neural networks to capture the characteristics of efficient resource allocation patterns, in order to spawn similar solutions in in similar situations. 
This technique should provide faster responses, once the neural network is trained. Our group has expertise and previous experience on 5G resource management, IoT and fog computing performance modelling. Regarding simulation tools, our group has already developed significant extensions to iFogSim [1], a state-of-the-art simulation tool relating IoT, cloud, fog and edge computing. However, this does not preclude the analysis of other simulators regarding their suitability to support this particular project.
The accepted fellow is expected to enroll in the PhD Programme in Electrical and Computer Engineering or the PhD Programme in Computer Science and Engineering at Instituto Superior Técnico – Universidade de Lisboa.

GROUP LEADER
Prof.Leonel Sousa
las@inesc-id.pt
RESEARCH PROJECT/RESEARCH GROUP
Leonel Sousa Homepage
http://sips.inesc-id.pt/las/
POSITION DESCRIPTION
-Research Project / Research Group Description:
The computer architecture research group at INESC-ID has a long term research experience in high-performance computing (HPC) and computer architectures/systems, including the investigation of: novel microprocessor architectures; application-specific hardware modules (e.g., data management, application-specific co-processors, cryptographic functions); modeling embedded and high-performance computing devices (e.g., CPUs/GPUs); trusted computing solutions; parallel computing and load balancing; or exploitation of homogeneous and heterogeneous computing systems for application acceleration. 
 
The research group is led by Leonel Sousa, a Full Professor at Instituto Superior Técnico (IST). Presently, he is also the head of both INESC-ID and the Department of Electrical and Computer Engineering of IST and a distinguished scientist of ACM. Leonel Sousa published around 300 articles in international journals and conferences and collaborated in the organization of multiple scientific venues. The research group features other researchers with significant contributions in computer architectures, such as Aleksandar Ilic, Nuno Roma, Pedro Tomás and Ricardo Chaves, professors at IST and researchers at INESC-ID, which have a combined track record of over 200 papers in journals and conferences, including in top-tier venues (e.g., HPCA, Micro, CHES, PACT, ISPASS, IEEE TPDS, IEEE TC, etc.).
The group has established important collaborations with industrial partners over the years (e.g., Intel, AMD, ARM, NVIDIA, Maxeller) and has contributed to many important research projects. Currently, these researchers collaborate in the European Processor Initiative (EPI), a European funded framework for the development of a new generation of low-power and extreme-scale computing devices, and lead or are partners in different research projects related to the development of post-quantum trusted platforms and of HPC systems for deep learning and bioinformatics applications.
-Job position description:
The research group is looking for a highly motivated PhD student with an excellent academic track record and good English skills to work in computer architectures and HPC systems. The PhD student will be enrolled in the Electrical and Computer Engineering PhD program at IST, and integrated into the current research activities and projects at INESC-ID, particularly in the investigation of new architectures and systems for HPC, bioinformatics and deep learning applications. 
 
The rise of data collection and storage facilities have led to an explosion of the data that current systems must process. Because of this, application performance is often limited by the bandwidth and latency of the memory subsystem, constraining both processing throughput and energy-efficiency. Additionally, nowadays security requirements, force the development of trustworthy systems. The researchers of the computer architecture group are investigating solutions for these problems, at the following levels:
- Memory subsystem: New methodologies to overcome the memory bandwidth/latency limitations, including through non-conventional computing;
- Computer architecture: New techniques to improve the energy-efficiency of modern computing systems, e.g., through new micro-architectural approaches or power-saving techniques;
- Performance modeling: New approaches for performance, power, and energy-efficiency modeling of modern architectures (e.g., CPU/GPU), and its applications (e.g., DVFS);
- Applications: New parallel and HPC techniques for efficient execution and distribution of workloads across computing devices;
- Trust and Security: Novel computing structures and architectural solutions to provide trust and security in modern and/or non-conventional architectures.

GROUP LEADER
Prof.Paulo Rogério Pereira
Paulo.Pereira@tecnico.ulisboa.pt
RESEARCH PROJECT/RESEARCH GROUP
Computing Systems and Communication Networks, INESC-ID, Lisboa, Portugal
https://www.inesc-id.pt/research-areas/computing-systems-and-communication-networks/
POSITION DESCRIPTION
-Research Project / Research Group Description:
INESC-ID, Instituto de Engenharia de Sistemas e Computadores, Investigação e Desenvolvimento em Lisboa, Portugal is dedicated to Research & Development in the fields of Information Technologies, Electronics, Communications and Energy. 
INESC-ID is a non-profit institution, privately owned by Instituto Superior Técnico, Universidade de Lisboa and INESC, officially declared of public interest. It was created in 2000, as a result of a reorganization of its parent institution INESC. Since December 2004, the institution has the status of “Associate Laboratory”, by FCT.
The main objectives of INESC-ID are to integrate competences from researchers in electrical engineering and computer science to advance the state of the art in computers, telecommunications, information systems and energy and to perform technology transfer.
The work is to be done within the Computing Systems and Communication Networks Research Line at INESC-ID, which does research in the fundamental areas of knowledge required to assure efficient, safe, reliable, secure, and trustworthy computing and network systems to support the whole structure of the modern networks and complex software.
A collaboration with R&D Nester (Centro de Investigação em Energia REN-State Grid, S.A.), the research and development laboratory of the Portuguese energy Transmission System Operator (TSO), has been established for the scenarios to be built in this work. The scenarios may be built in Nester’s Real Time Power System Simulation Laboratory. 
The student should follow the Ph.D. Programme in Electrical and Computer Engineering (PDEEC) from Instituto Superior Técnico, Universidade de Lisboa, Portugal. Técnico is the largest and the most competitive university in Portugal, and is recognised as a prestigious school at national and international level, namely in the fields of Architecture, Engineering, Science and Technology. It comprises Portugal’s most prestigious Laboratories and RD&I centres.
-Job position description:
The deployment of the concept of Smart Grids and the digitalization of the power system, i.e. the usage of digital solutions in power systems, is taking place all around the world. This has changed completely the context under which power systems are operated nowadays, bringing new design challenges. 
This job consists on performing a study of cyber-security for communications networks in power systems in collaboration with R&D Nester. The study should produce cyber-security best practices for power system communications and produce laboratory prototypes demonstrating some of them. The work includes the following phases:
Study the communication standards for electrical substations. Study of relevant parts of IEC 61850 (electrical substation automation), IEC 60870-5-101 and 60870-5-104 (SCADA telecontrol), Relevant parts of IEC 60870-6 (Inter-Control Center Communications Protocol - ICCP), Relevant parts of IEC 62351 (cyber-security for power system communications), IEEE 1588 (Precision Time Protocol - PTP). 
State of the art survey. Study of scientific papers, commercial available systems, utility policies, documentation from manufacturers of Intelligent Electronic Devices (IED), presence in a conference (e.g. Energy Intrusion Detection conference, https://www.smartgrid-forums.com/forums/energy-intrusion-detection/ ), meetings with utility persons in charge for cyber-security.
Identification of: vulnerabilities of power system communication networks, possible types of attacks, test cases to assess the security of power system communication networks.
Project a prototype platform (hardware and software) to implement some of the defined test cases. Implement them in Nester’s Real Time Power System Simulation Laboratory and do a performance evaluation. 
The outcome of the work should be cyber-security best practices for power system utilities.

One research grant(s)  Bolsa de Investigacão - Mestre is now available in project SARRROCA, “Synthetic Aperture Radar Robust Reconfigurable Optimized Computing Architecture” - ref: PTDC/EEI-HAC/31819/2017 funded by FCT/MCTES through national funds, and, where appropriate, POCI - Programa Operacional Competitividade e Internacionalização e PORLisboa – Programa Operacional Regional de Lisboa, under the following conditions:
Duration
Six months from 1 of October 2019. The grant may be renewed within the period of the project, not exceeding the maximum period set by FCT for such grants. Renewal is subject to suitable performance
Legislation
A fellowship contract will be celebrated according to the Regulations for Research Grants of the Foundation for Science and Technology in force the INESC ID Grant regulations approved by FCT, and to the Status of Scientific Research Fellow (Lei nº 40/2004 de 18 de Agosto, and its successive amendments).
Monthly amount
The monthly amount of the grant 989,70€ is in accordance with the values stipulated in the “Regulations for Research Grants of the Foundation for Science and Technology” in force (https://www.fct.pt/apoios/bolsas/regulamentos.phtml.pt) and (http://www.fct.pt/apoios/bolsas/valores) and INESC-ID Lisboa Grant Regulations approved by FCT, and shall be rendered through a monthly bank transfer to an account held by the grantee
Objectives / summary
This research work aims to develop a fault-tolerant embedded system using Xilinx FPGAs. The research work will involve designing novel hardware architectures and study and implementation of adequate fault-tolerant mechanisms. Expected outputs of this work are the implementation of prototypes for real-time fault-tolerant architectures.
Required education Level and research experience
The candidate should have an MSc degree in Computer Science and Engineering, or Electrical and Electronic Engineering and research project experience in System on a Chip design using FPGAs from Xilinx.  The candidate should be familiarized with most common fault-tolerance mechanisms on FPGAs. Language skills - proficiency in English. Preference will be given to candidates willing to pursue a PhD degree.

One research grant(s)  Bolsa de Investigacão - Mestre is now available in project SARRROCA, “Synthetic Aperture Radar Robust Reconfigurable Optimized Computing Architecture” - ref: PTDC/EEI-HAC/31819/2017 funded by FCT/MCTES through national funds, and, where appropriate, POCI - Programa Operacional Competitividade e Internacionalização e PORLisboa – Programa Operacional Regional de Lisboa, under the following conditions:
Duration
Six months from 1 of October 2019. The grant may be renewed within the period of the project, not exceeding the maximum period set by FCT for such grants. Renewal is subject to suitable performance
Legislation
A fellowship contract will be celebrated according to the Regulations for Research Grants of the Foundation for Science and Technology in force the INESC ID Grant regulations approved by FCT, and to the Status of Scientific Research Fellow (Lei nº 40/2004 de 18 de Agosto, and its successive amendments).
Monthly amount
The monthly amount of the grant 989,70€ is in accordance with the values stipulated in the “Regulations for Research Grants of the Foundation for Science and Technology” in force (https://www.fct.pt/apoios/bolsas/regulamentos.phtml.pt) and (http://www.fct.pt/apoios/bolsas/valores) and INESC-ID Lisboa Grant Regulations approved by FCT, and shall be rendered through a monthly bank transfer to an account held by the grantee
Objectives / summary
This research work aims to develop a fault-tolerant embedded system using ARM/AVR/Arduino devices. The research work will involve designing novel hardware architectures and study and implementation of adequate fault-tolerant mechanisms. Expected outputs of this work are the implementation of prototypes for real-time fault-tolerant architectures.
Required education Level and research experience
The candidate should have an MSc degree in Computer Science and Engineering, or Electrical and Electronic Engineering and research project experience in embedded systems.  The candidate should be familiarized with Arduino and ARM platforms. The candidate should also demonstrate experience in sensors and actuators connected to an Arduino. Language skills - proficiency in English.  Preference will be given to candidates willing to pursue a PhD degree

Natural language processing (NLP) received a strong push in the last decade, due to the abundance of web data, and leveraging advances on statistical machine learning. While many different NLP tasks have seen significant progress, issues like (a) handling figurative devices (e.g., irony or metaphor) in written text, or (b) document-level parsing of discourse and/or argumentation structures, remain significantly challenging.
Discourse parsing requires understanding the communicative/argumentative roles of sentences or parts of a document, as well as their relationships. For that, typical features related to words and simple syntax cues are clearly insufficient, and mechanisms like understanding interactivity, coherence and thematic development are required. These difficulties motivate additional research towards building better representations for the text, that can then be explored by machine learning methods.
Discourse parsing is closely related to argumentation mining from text, a challenge that only recently has come to the attention of NLP researchers. Many important challenges remain open, particularly if we consider text that are not essentially argumentative, related with existing heterogeneous argumentative styles. Argumentation involves a large and heterogeneous set of linguistic representations humans have at their disposal. Argumentation processes have been studied in diverse areas (e.g., philosophy, linguistics, or even artificial intelligence); on the other hand, NLP approaches for argumentation mining are relatively scarce in the literature, particularly for other languages besides English.
The Discourse Analysis and Argumentation Mining from Text Sources (DARGMINTS) project proposes to study NLP/IE techniques for addressing the task of argument mining from text, focusing on the Portuguese language (for which there is no relevant prior work), considering sources such as (a) news articles, (b) parliamentary debate transcriptions, and (c) discussions in specific social network profiles. The development of an NLP pipeline for the Portuguese language will be carried on, leveraging recent advances in the area. This NLP pipeline will support more advanced tasks, related to document-level parsing of discourse and to mining argument structures, to be aligned with argumentation schemes and discourse theories.
We also envision the development of new interactive visualizations for exploring argumentation patterns and processes. Such visualizations will be the basis for building appealing applications, that resort to different types of textual sources (news, parliamentary debate or on-line discussion archives), in areas related with media studies, political science or forensics (e.g. identifying opinion makers, detecting fallacies or radicalization processes), as well as applications specifically tailored for researchers in applied linguistics.
Within the DARGMINTS project, the researcher that is to be hired will broadly work on all the tasks that were considered in the project, although with a specific focus on deep learning methods for natural language processing, particularly addressing cross-language and transfer-learning methods for applications related to argumentation mining from text.