IObundle IP at 2020 Design&Reuse top10
IOb-SoC is a System-on-Chip template equipped with a CPU, a memory system and a serial communications module. By democratising the use of CPUs in electronic design, IOb-SoC is at the forefront of enabling powerful AI and machine learning algorithms in all sorts of electronic equipments, especially ultra low-poer ones. Users can easily customise IOb-SoC to implement more complex and specific SoCs. It uses RISC-V processors at its core, dispensing with cumbersome and expensive solutions such as ARM processors. By democratising the use of CPUs in electronic design, IOb-SoC is at the forefront of enabling powerful AI and machine learning algorithms in all sorts of electronic equipment, especially ultra-low-power ones. It is released in the public domain under the MIT permissive license and distributed using the Github platform. By providing the code publicly, and at no charge, stakeholders can easily use IOb-SoC for teaching, research, and industrial innovation.
The motivation for IOb-SoC is that of a speedy and straightforward setup, quickly grasped by students, instructors, researchers and innovators. The IOb-SoC hardware uses the System Verilog language, and its software uses the C/C++ languages.
The design is straightforward: the processor reads instructions and accesses data from the memory system and peripherals, and executes the program. The system has been used in several master’s dissertations and is being used in one PhD work, supervised by our researcher José Teixeira de Sousa.
IOb-SoC has also been used as a research tool and industrial applications.
International European Conference on Parallel and Distributed Computing
The 27th International European Conference on Parallel and Distributed Computing (Euro-Par 2021) will take from August 30 to September 3 2021 in Lisbon.
Euro-Par is the prime European conference covering all aspects of parallel and distributed processing, ranging from theory to practice, from small to the largest parallel and distributed systems and infrastructures, from fundamental computational problems to full-fledged applications, from architecture, compiler, language and interface design and implementation, to tools, support infrastructures, and application performance aspects.
The 2021 edition of Euro-Par will be organized as a collaboration between INESC-ID and Instituto Superior Técnico (IST).
– Abstract Submission: February 5, 2021
– Paper Submission Deadline: February 12, 2021
– Author Notification: April 30, 2021
– Camera-Ready Papers: June 6, 2021
More information is available here.