Programming Non-Volatile Memory (INESC-ID and IST Distinguished Lecture)
Professor James Larus,
School of Computer and Communication Sciences (IC) at EPFL (École Polytechnique Fédérale de Lausanne)
New memory technologies are changing the computer systems landscape. Motivated by the power limitations of DRAM, new, non-volatile memory (NVM) technologies — such as ReRAM, PCM, and STT-RAM — are likely to be widely deployed in server and commodity computers in the near future. These memories erase the classical dichotomy between slow, non-volatile disks or SSDs and fast, volatile memory, greatly expanding the possible uses of durability mechanisms.
Taking advantage of non-volatility is not as simple as just writing data to NVM. Without programming support, it is challenging to write correct, efficient code that permits recovery after a power failure since the restart mechanism must find a consistent state in the durable storage. This problem is well-known in the database community, and a significant portion of a DB system is devoted to ensuring recoverability after failures.
NVM differs, however, because its writes are fine-grain, low-cost, and go directly to memory, leaving little opportunity for software intervention. This talk will present new and effective techniques and programming language support for these memories.
James Larus is Professor and Dean of the School of Computer and Communication Sciences (IC) at EPFL (École Polytechnique Fédérale de Lausanne). Prior to joining IC in October 2013, Larus was a researcher, manager, and director in Microsoft Research for over 16 years and an assistant and associate professor in the Computer Sciences Department at the University of Wisconsin, Madison.
IST Alameda – Anfiteatro Abreu Faro